1. Field of Invention
The present invention relates to a data writing method for non-volatile memories, and more particularly to a data writing method for flash memories.
2. Description of the Related Art
Having the characteristics of non-volatility, high-density, fast response speed and so on, flash memories have become more and more popular among the memories. For a memory, the reliability of the memory elements is closely related to the saving of memorized data. Therefore, in recent years, various data writing methods for flash memories have been provided for advancing the reliability of flash memories.
FIG. 1 is a diagram showing a conventional data writing method for flash memories, where a square wave signal VBLT1 and a square wave signal VWL1 are respectively applied to a switching unit 110 and a word line WL1 for writing data purpose. The switching unit 110 is formed by an N-type transistor MN1. Considering the equivalent impedance of the N-type transistor MN1 as a resistor R1, the drain voltage VD1 via a bit line BL1 provided by the switching unit 110 can be expressed by an equation ofVD1=VDD−ID1*R1  (1)where VDD is the operation voltage of the switching unit 110 and ID1 is the drain current via the bit line BL1.
FIG. 2 is a timing graphic relating the method in FIG. 1. Referring to FIG. 2, with the increase of the writing time, the threshold voltage of a flash memory cell 101 would rise, and the drain current ID1 via the bit line BL1 is gradually decreased. According to the equation (1), the declined drain current ID1 would boost the drain voltage VD1. Therefore, at the point, all the flash memory cells 101˜104 connected to the same bit line BL1 would spark a drain disturbance due to the bias on the common bit line BL1 (a continuously increased drain voltage VD1), which further affects the reliability of the flash memory 120.
To avoid the drain disturbance, another conventional data writing method for flash memories is provided, as shown in FIG. 3. Wherein, a square wave signal VBLT3 is applied to the switching unit 110, and an ascent wave signal VWL3 is applied to a word line WL1. The drain current ID3 passing through the bit line BL1 would be not to decline with the varied threshold voltage VTh of the flash memory cell 130 because the voltage levels of the ascent wave signal VWL3 are increased with the writing time. Such an unvaried drain current ID3 with the writing time would generate a stable drain voltage VD3, which contributes to reduce the influence of the drain disturbance. FIG. 4 is a timing graphic relating the method in FIG. 3, where the relationships between the drain current ID3/drain voltage VD3 and the writing time are illustrated. Although the conventional data writing method for a flash memory as shown in FIG. 3 is able to reduce the influence of a drain disturbance on the flash memory 120, however, a flash memory cell 105 together with the flash memory cell 101 connected to a same word line WL1 would spark a gate disturbance due to the bias on the common word line WL1 (a continuously increased signal), which also affects the reliability of the flash memory 120.
It can be seen from the above that by using the conventional data writing method for a flash memory, a so-called gate disturbance or a drain disturbance would be generated with other flash memory cells which are connected to the same word line or the same bit line as a flash memory cell is in writing operation since a same bias is applied to both the other flash memory cells and the flash memory cell in writing operation. In other words, by using the conventional data writing method for flash memories, the reliability of a flash memory would decay with the increased number of writing operations due to a gate disturbance or a drain disturbance, which further affects the correctness of data saving, or even results in damaging the flash memory.